Type systems are used in computing systems to organize values and select specific operations on values.

In typed systems, functions take arguments with specific input types and produce output with a specific output type. By restricting the values taken as input and the values produced as output, the type signature of a function makes it easier to understand.

SIMD programming systems encode type signatures of operations in a variety of ways.

• LLVM vector types specify both the number of elements and the size of elements, providing for convenient overloading of operations.
• Intel SIMD intrinsics have types such as __m128i for 128-bit SSE-family registers and __m256i for 256-bit AVX family registers.
• The IDISA builders of Parabix use a single concept of BitBlock as the type of all values that can be stored in SIMD registers of the selected architecture.

LLVM Vector Types and Operations

The LLVM vector type <N x iM> defines a SIMD vector of N elements each having a width of M bits.

LLVM uses strong static typing:

• all inputs and outputs of basic operations must have specific types and the types must match constraints set by the operation.
• the type correctness of LLVM operations is checked at compile time (statically), not relying on dynamic inspection.

For example, the LLVM add operation and other binary operations can be generally used for SIMD vertical operations with the two inputs and two outputs all having the same vector type.

In principle, LLVM supports SIMD operations on any vector types, but most back-ends will only support mapping to actual SIMD instructions when the LLVM types match the available SIMD architecture.

For vector types not supported by a specific architecture, LLVM can generally employ strategies based on widening field values, splitting registers to match size constraints, or, as a last resort, scalarization.

LLVM BitCasts

The LLVM bitcast operation allows values to be converted between compatible types without changing any bits.

The two types must have the same total number of bits.

• iK values can be bitcast to <N x iM> if K = N\(\times\)M.
• <N x iM> can be bitcast to <P x iQ> if N\(\times\)M = P\(\times\) Q.
• <N x iM> values can be bitcast to iK if K = N\(\times\)M.

Bitcasts do not actually generate any run-time operations, i.e., there is no performance cost associated with bitcasts.

BitCasts with LLVM Horizontal Operations

When performing horizontal operations with LLVM it is often convenient to perform bitcasts.

For example, suppose we want to double the length of a stream of bytes by zero-extending each byte value to 16 bits. The LLVM zext instruction allows this.

%extended = zext <32 x i8> %a to <32 x i16>

But now suppose we want to extract <32 x i8> values. How do we do this? We can use bitcasts to good effect as follows.

%pair = bitcast <32 x i16> %extended to <2 x i256>
%r0 = extractelement <2 x i256> %pair, i32 0
%r1 = extractelement <2 x i256> %pair, i32 1
%v0 = bitcast i256 %r0 to <32 x i8>
%v1 = bitcast i256 %r1 to <32 x i8>

Intel Intrinsic Types and Operations

Intel only has a few different SIMD types, dependent on the SIMD register size: __m128i, __m256i, __m512i for vectors of integers. This means that we can't use generic add operations, but must encode the size of the register and the size of each field in the actual intrinsic operation. For example:

__m256i _mm256_add_epi32 (__m256i a, __m256i b)

IDISA Types and Operations

The IDISA builders in Parabix define a single SIMD register type called BitBlock, essentially a block of bits equal to the SIMD register size.

However, IDISA provides generic operations on BitBlocks by using the fieldwidth as a parameter for each SIMD operation. For example, given BitBlocks a and b with the AVX2 builder (256 bit), simd_add(8, a, b) is performs a <32 x i8> add, while simd_add(32, a, b) performs a <8 x i32> add.

When using the IDISA builders, you generally do not need to worry about creating the necessary LLVM bitcasts, those are done automatically for you.